#ifndef __LPDDR5_REGB_ADDR_MAP0_H__
#define __LPDDR5_REGB_ADDR_MAP0_H__

#include "main.h"

typedef struct __LPDDR5_REGB_ADDR_MAP0 {
    volatile uint32_t RSVD_0;	        // offset: 0x0 Reserved 0.
	volatile uint32_t ADDRMAP1;	        // offset: 0x4 default value: 0x0 read mask: 0xffffffff write mask 0x3f
	volatile uint32_t ADDRMAP3;	        // offset: 0xC default value: 0x0 read mask: 0xffffffff write mask 0x3f3f3f
	volatile uint32_t ADDRMAP4;	        // offset: 0x10 default value: 0x0 read mask: 0xffffffff write mask 0x3f3f
	volatile uint32_t ADDRMAP5;	        // offset: 0x14 default value: 0x0 read mask: 0xffffffff write mask 0x1f1f1f1f
	volatile uint32_t ADDRMAP6;	        // offset: 0x18 default value: 0x0 read mask: 0xffffffff write mask 0xf0f0f0f
	volatile uint32_t ADDRMAP7;	        // offset: 0x1C default value: 0x0 read mask: 0xffffffff write mask 0x1f1f1f1f
	volatile uint32_t ADDRMAP8;	        // offset: 0x20 default value: 0x0 read mask: 0xffffffff write mask 0x1f1f1f1f
	volatile uint32_t ADDRMAP9;	        // offset: 0x24 default value: 0x0 read mask: 0xffffffff write mask 0x1f1f1f1f
	volatile uint32_t ADDRMAP10;	    // offset: 0x28 default value: 0x0 read mask: 0xffffffff write mask 0x1f1f1f1f
	volatile uint32_t ADDRMAP11;	    // offset: 0x2C default value: 0x0 read mask: 0xffffffff write mask 0x1f1f
	volatile uint32_t ADDRMAP12;	    // offset: 0x30 default value: 0x0 read mask: 0xffffffff write mask 0x7
} LPDDR5_REGB_ADDR_MAP0_t;

/****************************** Bit definition for ADDRMAP1 register ********************************/

#define ADDRMAP1_ADDRMAP_CS_BIT0_Pos		(0U)
#define ADDRMAP1_ADDRMAP_CS_BIT0_Msk		(0x3fUL << ADDRMAP1_ADDRMAP_CS_BIT0_Pos)
#define ADDRMAP1_ADDRMAP_CS_BIT0    		ADDRMAP1_ADDRMAP_CS_BIT0_Msk


/****************************** Bit definition for ADDRMAP3 register ********************************/

#define ADDRMAP3_ADDRMAP_BANK_B0_Pos		(0U)
#define ADDRMAP3_ADDRMAP_BANK_B0_Msk		(0x3fUL << ADDRMAP3_ADDRMAP_BANK_B0_Pos)
#define ADDRMAP3_ADDRMAP_BANK_B0    		ADDRMAP3_ADDRMAP_BANK_B0_Msk


#define ADDRMAP3_ADDRMAP_BANK_B1_Pos		(8U)
#define ADDRMAP3_ADDRMAP_BANK_B1_Msk		(0x3fUL << ADDRMAP3_ADDRMAP_BANK_B1_Pos)
#define ADDRMAP3_ADDRMAP_BANK_B1    		ADDRMAP3_ADDRMAP_BANK_B1_Msk


#define ADDRMAP3_ADDRMAP_BANK_B2_Pos		(16U)
#define ADDRMAP3_ADDRMAP_BANK_B2_Msk		(0x3fUL << ADDRMAP3_ADDRMAP_BANK_B2_Pos)
#define ADDRMAP3_ADDRMAP_BANK_B2    		ADDRMAP3_ADDRMAP_BANK_B2_Msk


/****************************** Bit definition for ADDRMAP4 register ********************************/

#define ADDRMAP4_ADDRMAP_BG_B0_Pos		(0U)
#define ADDRMAP4_ADDRMAP_BG_B0_Msk		(0x3fUL << ADDRMAP4_ADDRMAP_BG_B0_Pos)
#define ADDRMAP4_ADDRMAP_BG_B0    		ADDRMAP4_ADDRMAP_BG_B0_Msk


#define ADDRMAP4_ADDRMAP_BG_B1_Pos		(8U)
#define ADDRMAP4_ADDRMAP_BG_B1_Msk		(0x3fUL << ADDRMAP4_ADDRMAP_BG_B1_Pos)
#define ADDRMAP4_ADDRMAP_BG_B1    		ADDRMAP4_ADDRMAP_BG_B1_Msk


/****************************** Bit definition for ADDRMAP5 register ********************************/

#define ADDRMAP5_ADDRMAP_COL_B7_Pos		(0U)
#define ADDRMAP5_ADDRMAP_COL_B7_Msk		(0x1fUL << ADDRMAP5_ADDRMAP_COL_B7_Pos)
#define ADDRMAP5_ADDRMAP_COL_B7    		ADDRMAP5_ADDRMAP_COL_B7_Msk


#define ADDRMAP5_ADDRMAP_COL_B8_Pos		(8U)
#define ADDRMAP5_ADDRMAP_COL_B8_Msk		(0x1fUL << ADDRMAP5_ADDRMAP_COL_B8_Pos)
#define ADDRMAP5_ADDRMAP_COL_B8    		ADDRMAP5_ADDRMAP_COL_B8_Msk


#define ADDRMAP5_ADDRMAP_COL_B9_Pos		(16U)
#define ADDRMAP5_ADDRMAP_COL_B9_Msk		(0x1fUL << ADDRMAP5_ADDRMAP_COL_B9_Pos)
#define ADDRMAP5_ADDRMAP_COL_B9    		ADDRMAP5_ADDRMAP_COL_B9_Msk


#define ADDRMAP5_ADDRMAP_COL_B10_Pos		(24U)
#define ADDRMAP5_ADDRMAP_COL_B10_Msk		(0x1fUL << ADDRMAP5_ADDRMAP_COL_B10_Pos)
#define ADDRMAP5_ADDRMAP_COL_B10    		ADDRMAP5_ADDRMAP_COL_B10_Msk


/****************************** Bit definition for ADDRMAP6 register ********************************/

#define ADDRMAP6_ADDRMAP_COL_B3_Pos		(0U)
#define ADDRMAP6_ADDRMAP_COL_B3_Msk		(0xfUL << ADDRMAP6_ADDRMAP_COL_B3_Pos)
#define ADDRMAP6_ADDRMAP_COL_B3    		ADDRMAP6_ADDRMAP_COL_B3_Msk


#define ADDRMAP6_ADDRMAP_COL_B4_Pos		(8U)
#define ADDRMAP6_ADDRMAP_COL_B4_Msk		(0xfUL << ADDRMAP6_ADDRMAP_COL_B4_Pos)
#define ADDRMAP6_ADDRMAP_COL_B4    		ADDRMAP6_ADDRMAP_COL_B4_Msk


#define ADDRMAP6_ADDRMAP_COL_B5_Pos		(16U)
#define ADDRMAP6_ADDRMAP_COL_B5_Msk		(0xfUL << ADDRMAP6_ADDRMAP_COL_B5_Pos)
#define ADDRMAP6_ADDRMAP_COL_B5    		ADDRMAP6_ADDRMAP_COL_B5_Msk


#define ADDRMAP6_ADDRMAP_COL_B6_Pos		(24U)
#define ADDRMAP6_ADDRMAP_COL_B6_Msk		(0xfUL << ADDRMAP6_ADDRMAP_COL_B6_Pos)
#define ADDRMAP6_ADDRMAP_COL_B6    		ADDRMAP6_ADDRMAP_COL_B6_Msk


/****************************** Bit definition for ADDRMAP7 register ********************************/

#define ADDRMAP7_ADDRMAP_ROW_B14_Pos		(0U)
#define ADDRMAP7_ADDRMAP_ROW_B14_Msk		(0x1fUL << ADDRMAP7_ADDRMAP_ROW_B14_Pos)
#define ADDRMAP7_ADDRMAP_ROW_B14    		ADDRMAP7_ADDRMAP_ROW_B14_Msk


#define ADDRMAP7_ADDRMAP_ROW_B15_Pos		(8U)
#define ADDRMAP7_ADDRMAP_ROW_B15_Msk		(0x1fUL << ADDRMAP7_ADDRMAP_ROW_B15_Pos)
#define ADDRMAP7_ADDRMAP_ROW_B15    		ADDRMAP7_ADDRMAP_ROW_B15_Msk


#define ADDRMAP7_ADDRMAP_ROW_B16_Pos		(16U)
#define ADDRMAP7_ADDRMAP_ROW_B16_Msk		(0x1fUL << ADDRMAP7_ADDRMAP_ROW_B16_Pos)
#define ADDRMAP7_ADDRMAP_ROW_B16    		ADDRMAP7_ADDRMAP_ROW_B16_Msk


#define ADDRMAP7_ADDRMAP_ROW_B17_Pos		(24U)
#define ADDRMAP7_ADDRMAP_ROW_B17_Msk		(0x1fUL << ADDRMAP7_ADDRMAP_ROW_B17_Pos)
#define ADDRMAP7_ADDRMAP_ROW_B17    		ADDRMAP7_ADDRMAP_ROW_B17_Msk


/****************************** Bit definition for ADDRMAP8 register ********************************/

#define ADDRMAP8_ADDRMAP_ROW_B10_Pos		(0U)
#define ADDRMAP8_ADDRMAP_ROW_B10_Msk		(0x1fUL << ADDRMAP8_ADDRMAP_ROW_B10_Pos)
#define ADDRMAP8_ADDRMAP_ROW_B10    		ADDRMAP8_ADDRMAP_ROW_B10_Msk


#define ADDRMAP8_ADDRMAP_ROW_B11_Pos		(8U)
#define ADDRMAP8_ADDRMAP_ROW_B11_Msk		(0x1fUL << ADDRMAP8_ADDRMAP_ROW_B11_Pos)
#define ADDRMAP8_ADDRMAP_ROW_B11    		ADDRMAP8_ADDRMAP_ROW_B11_Msk


#define ADDRMAP8_ADDRMAP_ROW_B12_Pos		(16U)
#define ADDRMAP8_ADDRMAP_ROW_B12_Msk		(0x1fUL << ADDRMAP8_ADDRMAP_ROW_B12_Pos)
#define ADDRMAP8_ADDRMAP_ROW_B12    		ADDRMAP8_ADDRMAP_ROW_B12_Msk


#define ADDRMAP8_ADDRMAP_ROW_B13_Pos		(24U)
#define ADDRMAP8_ADDRMAP_ROW_B13_Msk		(0x1fUL << ADDRMAP8_ADDRMAP_ROW_B13_Pos)
#define ADDRMAP8_ADDRMAP_ROW_B13    		ADDRMAP8_ADDRMAP_ROW_B13_Msk


/****************************** Bit definition for ADDRMAP9 register ********************************/

#define ADDRMAP9_ADDRMAP_ROW_B6_Pos		(0U)
#define ADDRMAP9_ADDRMAP_ROW_B6_Msk		(0x1fUL << ADDRMAP9_ADDRMAP_ROW_B6_Pos)
#define ADDRMAP9_ADDRMAP_ROW_B6    		ADDRMAP9_ADDRMAP_ROW_B6_Msk


#define ADDRMAP9_ADDRMAP_ROW_B7_Pos		(8U)
#define ADDRMAP9_ADDRMAP_ROW_B7_Msk		(0x1fUL << ADDRMAP9_ADDRMAP_ROW_B7_Pos)
#define ADDRMAP9_ADDRMAP_ROW_B7    		ADDRMAP9_ADDRMAP_ROW_B7_Msk


#define ADDRMAP9_ADDRMAP_ROW_B8_Pos		(16U)
#define ADDRMAP9_ADDRMAP_ROW_B8_Msk		(0x1fUL << ADDRMAP9_ADDRMAP_ROW_B8_Pos)
#define ADDRMAP9_ADDRMAP_ROW_B8    		ADDRMAP9_ADDRMAP_ROW_B8_Msk


#define ADDRMAP9_ADDRMAP_ROW_B9_Pos		(24U)
#define ADDRMAP9_ADDRMAP_ROW_B9_Msk		(0x1fUL << ADDRMAP9_ADDRMAP_ROW_B9_Pos)
#define ADDRMAP9_ADDRMAP_ROW_B9    		ADDRMAP9_ADDRMAP_ROW_B9_Msk


/****************************** Bit definition for ADDRMAP10 register ********************************/

#define ADDRMAP10_ADDRMAP_ROW_B2_Pos		(0U)
#define ADDRMAP10_ADDRMAP_ROW_B2_Msk		(0x1fUL << ADDRMAP10_ADDRMAP_ROW_B2_Pos)
#define ADDRMAP10_ADDRMAP_ROW_B2    		ADDRMAP10_ADDRMAP_ROW_B2_Msk


#define ADDRMAP10_ADDRMAP_ROW_B3_Pos		(8U)
#define ADDRMAP10_ADDRMAP_ROW_B3_Msk		(0x1fUL << ADDRMAP10_ADDRMAP_ROW_B3_Pos)
#define ADDRMAP10_ADDRMAP_ROW_B3    		ADDRMAP10_ADDRMAP_ROW_B3_Msk


#define ADDRMAP10_ADDRMAP_ROW_B4_Pos		(16U)
#define ADDRMAP10_ADDRMAP_ROW_B4_Msk		(0x1fUL << ADDRMAP10_ADDRMAP_ROW_B4_Pos)
#define ADDRMAP10_ADDRMAP_ROW_B4    		ADDRMAP10_ADDRMAP_ROW_B4_Msk


#define ADDRMAP10_ADDRMAP_ROW_B5_Pos		(24U)
#define ADDRMAP10_ADDRMAP_ROW_B5_Msk		(0x1fUL << ADDRMAP10_ADDRMAP_ROW_B5_Pos)
#define ADDRMAP10_ADDRMAP_ROW_B5    		ADDRMAP10_ADDRMAP_ROW_B5_Msk


/****************************** Bit definition for ADDRMAP11 register ********************************/

#define ADDRMAP11_ADDRMAP_ROW_B0_Pos		(0U)
#define ADDRMAP11_ADDRMAP_ROW_B0_Msk		(0x1fUL << ADDRMAP11_ADDRMAP_ROW_B0_Pos)
#define ADDRMAP11_ADDRMAP_ROW_B0    		ADDRMAP11_ADDRMAP_ROW_B0_Msk


#define ADDRMAP11_ADDRMAP_ROW_B1_Pos		(8U)
#define ADDRMAP11_ADDRMAP_ROW_B1_Msk		(0x1fUL << ADDRMAP11_ADDRMAP_ROW_B1_Pos)
#define ADDRMAP11_ADDRMAP_ROW_B1    		ADDRMAP11_ADDRMAP_ROW_B1_Msk


/****************************** Bit definition for ADDRMAP12 register ********************************/

#define ADDRMAP12_NONBINARY_DEVICE_DENSITY_Pos		(0U)
#define ADDRMAP12_NONBINARY_DEVICE_DENSITY_Msk		(0x7UL << ADDRMAP12_NONBINARY_DEVICE_DENSITY_Pos)
#define ADDRMAP12_NONBINARY_DEVICE_DENSITY    		ADDRMAP12_NONBINARY_DEVICE_DENSITY_Msk


/****************************** Inline function for ADDRMAP1 register ********************************/

static inline void set_addrmap1_addrmap_cs_bit0(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP1, ADDRMAP1_ADDRMAP_CS_BIT0, VAL << ADDRMAP1_ADDRMAP_CS_BIT0_Pos);
}

static inline uint32_t get_addrmap1_addrmap_cs_bit0(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP1, ADDRMAP1_ADDRMAP_CS_BIT0) >> ADDRMAP1_ADDRMAP_CS_BIT0_Pos);
}

/****************************** Inline function for ADDRMAP3 register ********************************/

static inline void set_addrmap3_addrmap_bank_b0(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP3, ADDRMAP3_ADDRMAP_BANK_B0, VAL << ADDRMAP3_ADDRMAP_BANK_B0_Pos);
}

static inline uint32_t get_addrmap3_addrmap_bank_b0(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP3, ADDRMAP3_ADDRMAP_BANK_B0) >> ADDRMAP3_ADDRMAP_BANK_B0_Pos);
}

static inline void set_addrmap3_addrmap_bank_b1(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP3, ADDRMAP3_ADDRMAP_BANK_B1, VAL << ADDRMAP3_ADDRMAP_BANK_B1_Pos);
}

static inline uint32_t get_addrmap3_addrmap_bank_b1(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP3, ADDRMAP3_ADDRMAP_BANK_B1) >> ADDRMAP3_ADDRMAP_BANK_B1_Pos);
}

static inline void set_addrmap3_addrmap_bank_b2(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP3, ADDRMAP3_ADDRMAP_BANK_B2, VAL << ADDRMAP3_ADDRMAP_BANK_B2_Pos);
}

static inline uint32_t get_addrmap3_addrmap_bank_b2(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP3, ADDRMAP3_ADDRMAP_BANK_B2) >> ADDRMAP3_ADDRMAP_BANK_B2_Pos);
}

/****************************** Inline function for ADDRMAP4 register ********************************/

static inline void set_addrmap4_addrmap_bg_b0(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP4, ADDRMAP4_ADDRMAP_BG_B0, VAL << ADDRMAP4_ADDRMAP_BG_B0_Pos);
}

static inline uint32_t get_addrmap4_addrmap_bg_b0(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP4, ADDRMAP4_ADDRMAP_BG_B0) >> ADDRMAP4_ADDRMAP_BG_B0_Pos);
}

static inline void set_addrmap4_addrmap_bg_b1(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP4, ADDRMAP4_ADDRMAP_BG_B1, VAL << ADDRMAP4_ADDRMAP_BG_B1_Pos);
}

static inline uint32_t get_addrmap4_addrmap_bg_b1(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP4, ADDRMAP4_ADDRMAP_BG_B1) >> ADDRMAP4_ADDRMAP_BG_B1_Pos);
}

/****************************** Inline function for ADDRMAP5 register ********************************/

static inline void set_addrmap5_addrmap_col_b7(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B7, VAL << ADDRMAP5_ADDRMAP_COL_B7_Pos);
}

static inline uint32_t get_addrmap5_addrmap_col_b7(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B7) >> ADDRMAP5_ADDRMAP_COL_B7_Pos);
}

static inline void set_addrmap5_addrmap_col_b8(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B8, VAL << ADDRMAP5_ADDRMAP_COL_B8_Pos);
}

static inline uint32_t get_addrmap5_addrmap_col_b8(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B8) >> ADDRMAP5_ADDRMAP_COL_B8_Pos);
}

static inline void set_addrmap5_addrmap_col_b9(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B9, VAL << ADDRMAP5_ADDRMAP_COL_B9_Pos);
}

static inline uint32_t get_addrmap5_addrmap_col_b9(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B9) >> ADDRMAP5_ADDRMAP_COL_B9_Pos);
}

static inline void set_addrmap5_addrmap_col_b10(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B10, VAL << ADDRMAP5_ADDRMAP_COL_B10_Pos);
}

static inline uint32_t get_addrmap5_addrmap_col_b10(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP5, ADDRMAP5_ADDRMAP_COL_B10) >> ADDRMAP5_ADDRMAP_COL_B10_Pos);
}

/****************************** Inline function for ADDRMAP6 register ********************************/

static inline void set_addrmap6_addrmap_col_b3(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B3, VAL << ADDRMAP6_ADDRMAP_COL_B3_Pos);
}

static inline uint32_t get_addrmap6_addrmap_col_b3(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B3) >> ADDRMAP6_ADDRMAP_COL_B3_Pos);
}

static inline void set_addrmap6_addrmap_col_b4(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B4, VAL << ADDRMAP6_ADDRMAP_COL_B4_Pos);
}

static inline uint32_t get_addrmap6_addrmap_col_b4(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B4) >> ADDRMAP6_ADDRMAP_COL_B4_Pos);
}

static inline void set_addrmap6_addrmap_col_b5(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B5, VAL << ADDRMAP6_ADDRMAP_COL_B5_Pos);
}

static inline uint32_t get_addrmap6_addrmap_col_b5(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B5) >> ADDRMAP6_ADDRMAP_COL_B5_Pos);
}

static inline void set_addrmap6_addrmap_col_b6(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B6, VAL << ADDRMAP6_ADDRMAP_COL_B6_Pos);
}

static inline uint32_t get_addrmap6_addrmap_col_b6(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP6, ADDRMAP6_ADDRMAP_COL_B6) >> ADDRMAP6_ADDRMAP_COL_B6_Pos);
}

/****************************** Inline function for ADDRMAP7 register ********************************/

static inline void set_addrmap7_addrmap_row_b14(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B14, VAL << ADDRMAP7_ADDRMAP_ROW_B14_Pos);
}

static inline uint32_t get_addrmap7_addrmap_row_b14(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B14) >> ADDRMAP7_ADDRMAP_ROW_B14_Pos);
}

static inline void set_addrmap7_addrmap_row_b15(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B15, VAL << ADDRMAP7_ADDRMAP_ROW_B15_Pos);
}

static inline uint32_t get_addrmap7_addrmap_row_b15(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B15) >> ADDRMAP7_ADDRMAP_ROW_B15_Pos);
}

static inline void set_addrmap7_addrmap_row_b16(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B16, VAL << ADDRMAP7_ADDRMAP_ROW_B16_Pos);
}

static inline uint32_t get_addrmap7_addrmap_row_b16(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B16) >> ADDRMAP7_ADDRMAP_ROW_B16_Pos);
}

static inline void set_addrmap7_addrmap_row_b17(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B17, VAL << ADDRMAP7_ADDRMAP_ROW_B17_Pos);
}

static inline uint32_t get_addrmap7_addrmap_row_b17(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP7, ADDRMAP7_ADDRMAP_ROW_B17) >> ADDRMAP7_ADDRMAP_ROW_B17_Pos);
}

/****************************** Inline function for ADDRMAP8 register ********************************/

static inline void set_addrmap8_addrmap_row_b10(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B10, VAL << ADDRMAP8_ADDRMAP_ROW_B10_Pos);
}

static inline uint32_t get_addrmap8_addrmap_row_b10(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B10) >> ADDRMAP8_ADDRMAP_ROW_B10_Pos);
}

static inline void set_addrmap8_addrmap_row_b11(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B11, VAL << ADDRMAP8_ADDRMAP_ROW_B11_Pos);
}

static inline uint32_t get_addrmap8_addrmap_row_b11(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B11) >> ADDRMAP8_ADDRMAP_ROW_B11_Pos);
}

static inline void set_addrmap8_addrmap_row_b12(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B12, VAL << ADDRMAP8_ADDRMAP_ROW_B12_Pos);
}

static inline uint32_t get_addrmap8_addrmap_row_b12(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B12) >> ADDRMAP8_ADDRMAP_ROW_B12_Pos);
}

static inline void set_addrmap8_addrmap_row_b13(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B13, VAL << ADDRMAP8_ADDRMAP_ROW_B13_Pos);
}

static inline uint32_t get_addrmap8_addrmap_row_b13(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP8, ADDRMAP8_ADDRMAP_ROW_B13) >> ADDRMAP8_ADDRMAP_ROW_B13_Pos);
}

/****************************** Inline function for ADDRMAP9 register ********************************/

static inline void set_addrmap9_addrmap_row_b6(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B6, VAL << ADDRMAP9_ADDRMAP_ROW_B6_Pos);
}

static inline uint32_t get_addrmap9_addrmap_row_b6(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B6) >> ADDRMAP9_ADDRMAP_ROW_B6_Pos);
}

static inline void set_addrmap9_addrmap_row_b7(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B7, VAL << ADDRMAP9_ADDRMAP_ROW_B7_Pos);
}

static inline uint32_t get_addrmap9_addrmap_row_b7(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B7) >> ADDRMAP9_ADDRMAP_ROW_B7_Pos);
}

static inline void set_addrmap9_addrmap_row_b8(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B8, VAL << ADDRMAP9_ADDRMAP_ROW_B8_Pos);
}

static inline uint32_t get_addrmap9_addrmap_row_b8(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B8) >> ADDRMAP9_ADDRMAP_ROW_B8_Pos);
}

static inline void set_addrmap9_addrmap_row_b9(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B9, VAL << ADDRMAP9_ADDRMAP_ROW_B9_Pos);
}

static inline uint32_t get_addrmap9_addrmap_row_b9(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP9, ADDRMAP9_ADDRMAP_ROW_B9) >> ADDRMAP9_ADDRMAP_ROW_B9_Pos);
}

/****************************** Inline function for ADDRMAP10 register ********************************/

static inline void set_addrmap10_addrmap_row_b2(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B2, VAL << ADDRMAP10_ADDRMAP_ROW_B2_Pos);
}

static inline uint32_t get_addrmap10_addrmap_row_b2(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B2) >> ADDRMAP10_ADDRMAP_ROW_B2_Pos);
}

static inline void set_addrmap10_addrmap_row_b3(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B3, VAL << ADDRMAP10_ADDRMAP_ROW_B3_Pos);
}

static inline uint32_t get_addrmap10_addrmap_row_b3(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B3) >> ADDRMAP10_ADDRMAP_ROW_B3_Pos);
}

static inline void set_addrmap10_addrmap_row_b4(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B4, VAL << ADDRMAP10_ADDRMAP_ROW_B4_Pos);
}

static inline uint32_t get_addrmap10_addrmap_row_b4(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B4) >> ADDRMAP10_ADDRMAP_ROW_B4_Pos);
}

static inline void set_addrmap10_addrmap_row_b5(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B5, VAL << ADDRMAP10_ADDRMAP_ROW_B5_Pos);
}

static inline uint32_t get_addrmap10_addrmap_row_b5(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP10, ADDRMAP10_ADDRMAP_ROW_B5) >> ADDRMAP10_ADDRMAP_ROW_B5_Pos);
}

/****************************** Inline function for ADDRMAP11 register ********************************/

static inline void set_addrmap11_addrmap_row_b0(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP11, ADDRMAP11_ADDRMAP_ROW_B0, VAL << ADDRMAP11_ADDRMAP_ROW_B0_Pos);
}

static inline uint32_t get_addrmap11_addrmap_row_b0(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP11, ADDRMAP11_ADDRMAP_ROW_B0) >> ADDRMAP11_ADDRMAP_ROW_B0_Pos);
}

static inline void set_addrmap11_addrmap_row_b1(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP11, ADDRMAP11_ADDRMAP_ROW_B1, VAL << ADDRMAP11_ADDRMAP_ROW_B1_Pos);
}

static inline uint32_t get_addrmap11_addrmap_row_b1(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP11, ADDRMAP11_ADDRMAP_ROW_B1) >> ADDRMAP11_ADDRMAP_ROW_B1_Pos);
}

/****************************** Inline function for ADDRMAP12 register ********************************/

static inline void set_addrmap12_nonbinary_device_density(LPDDR5_REGB_ADDR_MAP0_t *INST, uint32_t VAL)
{
	MODIFY_REG(INST->ADDRMAP12, ADDRMAP12_NONBINARY_DEVICE_DENSITY, VAL << ADDRMAP12_NONBINARY_DEVICE_DENSITY_Pos);
}

static inline uint32_t get_addrmap12_nonbinary_device_density(LPDDR5_REGB_ADDR_MAP0_t *INST)
{
	return (uint32_t)(READ_BIT(INST->ADDRMAP12, ADDRMAP12_NONBINARY_DEVICE_DENSITY) >> ADDRMAP12_NONBINARY_DEVICE_DENSITY_Pos);
}

#endif // __LPDDR5_REGB_ADDR_MAP0_H__
